1. Field of the Invention
The present invention relates to a receiver of a CDMA system, and in particular relates to a receiver of CDMA system with a path alignment circuit to efficiently reduce memory size required by the CDMA system.
2. Description of the Related Art
Referring to FIG. 1, the de-spreading process of a CDMA system is schematically shown. In a CDMA (code division multiple access) system such as a WCDMA (wideband CDMA) system, multi-path signals or data ms1˜ms3 are de-spread separately by de-spreaders 101˜103. Then, the three de-spread signals are combined together by a combiner 104 to generate a demodulated signal with better signal-to-noise ratio. Multi-path signals ms1˜ms3 are transmit in different paths and thus have different arrival times to the de-spreaders 101˜103 (or to receiver of the CDMA system). To achieve timing alignment in the combiner 104, two basic architectures are widely applied in conventional art.
Referring to FIG. 2A, a first architecture to fulfill the timing alignment is schematically shown. In FIG. 2A, input data Din (usually samples of the multi-path signals 101˜103) are respectively buffered in a buffer 201, and then simultaneously de-spread by the de-spreaders 101˜103. Referring to FIG. 2B, a second architecture to fulfill the timing alignment is schematically shown. In FIG. 2B, input data Din (usually samples of the multi-path signals 101˜103) are incoherently de-spread by the de-spreaders 101˜103, and then the de-spread samples are buffered in the buffers 202˜204 respectively before being sent to the combiner 104.
In regard to FIG. 2A, the architecture of “buffering before de-spreader” can achieve low cost. To combine the multi-path signals at different arrival times, the input data must be buffered in a memory (i.e., the buffer) for the alignment in the combiner, and the memory size shall be quite huge to accommodate the large delay spread of the multi-path signals in multi-path channel, particular when sampling the multi-path signals with a large sampling rate. Accordingly, a new CDMA receiver with a path alignment circuit is proposed to efficiently reduce memory size required by the CDMA system without degrading modem performance.